;Toggling the upper 4 bits of PORTT in Assembly Language for HCS12 Tower 
;with HCS12 Open Source BDM. This code is for CodeWarrior IDE
;In HCS12G128 Tower the RAM address starts at $2000 
;We use RAM addresses starting at $2000 for scratch pad (variables) and $3FFF for Stack 

;On TWR-S12G128 Tower board, 4 green LEDs are connected to PT7-PT4 
;They are active LOW. Make sure the jumers for all 4 LEDs are set.
;Modified and tested by Mazidi from Example 4-1 of Mazidi & Causey HCS12 textbook


;In CodeWarrior,make sure you are in Open Source BDM when downloading and running.
 
;Press F7 (to Make), then F5(Debug) to download,and F5 once more to start the program execution
   
        ABSENTRY Entry        ; for absolute assembly: mark this as application entry point
    
; Include derivative-specific definitions 
	INCLUDE 'mc9s12g128.inc'     ;CPU used by HCS12G128 Tower board
 
 
;----------------------USE $2000-$2FFF for Scratch Pad 
R1      EQU     $2001
R2      EQU     $2002
R3      EQU     $2003

;code section
        ORG   $8000     ;Flash ROM address for HCS12G128 Tower
Entry:
	LDS     #$4000    ;Stack
        LDAA    #$F0
        STAA    DDRT		;Make PTT7-PTT4 output
  
;-------Toggling the LEDs connected to upper 4-bit of PORTT

BACK    LDAA #$50
    	STAA PTT		;Store A into PORTT
	JSR DELAY
	LDAA #$A0
	STAA PTT
	JSR DELAY

        BRA BACK    
  
;----------DELAY
DELAY

        PSHA			;Save Reg A on Stack
        LDAA    #10		;Change this value to see  
        STAA    R3		;how fast LEDs Toggle
;--10 msec delay. 
;Freq. for Instruction Clock Cycle is 6.25MHz (1/2 of 12.5MHz) 
;(1/6.25MHz) x 10 Clk x62x100=10 msec. Overheads are excluded in this calculation.         
L3      LDAA    #100
        STAA    R2
L2      LDAA    #62
        STAA    R1
L1      NOP         ;1 Intruction Clk Cycle
        NOP	    ;1 
        NOP	    ;1 
        DEC     R1  ;4
        BNE     L1  ;3
        DEC     R2  ;Total Instr.Clk=10
        BNE     L2
        DEC     R3
        BNE     L3
;--------------        
        PULA			;Restore Reg A
        RTS
;-------------------

            
;**************************************************************
;*                 Interrupt Vectors                          *
;**************************************************************
            ORG   $FFFE
            DC.W  Entry     ;Reset Vector. CPU wakes here and it is sent to start of the code at $8000