;Displaying ATD0 channel 5 (POT) on LEDs of PORTB in Assembly Language for HCS12 MCU Module from Freesacle or Axiom. ;This C code tests on-board POT of the MCU Module without the Project Board ;HCS12 MCU Module comes with BDM and ready to work with CodeWarrior IDE ;Modified from Program 13-1 of HCS12 textbook by Mazidi & Causey ;In HCS12 MCU Module, XTAL=4MHz.4MHz/2=2MHz is the bus freq. ;ATD0 channel 5 (AN05) is connected to RV1 Brown/White POT. ;Make sure Jumper for RV1 is set. Also make sure the VB jumper for Power_SEL (next to power jack) is set since it is powered via USB cable ;Change the POT to see the changes on LEDs of PORTB ;In CodeWarrior, make sure you are in TBDML Mode before downloading ;Press F7 (to Make), then F5(Debug) to downLOAD,and F5 once more to start the program execution ;Make sure you are in TBDML Mode before downloading ;Press F7 (to Make), then F5(Debug) to downLOAD,and F5 once more to start the program execution ABSENTRY Entry ; for absolute assembly: mark this as application entry point ; Include derivative-specific definitions INCLUDE 'mc9s12dt256.inc' ;CPU used by Axiom board ;----------------------USE $1000-$2FFF for Scratch Pad R1 EQU $1001 R2 EQU $1002 R3 EQU $1003 ;code section ORG $4000 ;Flash ROM address Entry: LDS #$4000 ;Stack LDAA #$F0 STAA DDRB ;Make PB3-PB4 as output ;-------Get data fron Chan 5 of ATD0 and put it on LEDs of PORTB MOVB #$80,ATD0CTL2 JSR DELAY MOVB #$08,ATD0CTL3 MOVB #$E0,ATD0CTL4 ;8-bit resolu, 16-clock for 2nd phase, ;prescaler of 0 for Conversion Freq=1MHz H1 MOVB #$85,ATD0CTL5 ;Chan 5 of ATD0 H2 BRCLR ATD0STAT0,$80,H2 LDAA ATD0DR0L STAA PORTB JSR DELAY ;Optional BRA H1 ;Keep reading the ADC ;----------DELAY DELAY PSHA ;Save Reg A on Stack LDAA #10 ;Change this value to see STAA R3 ;how fast LEDs Toggle ;--10 msec delay. The Axiom board works with XTAL=4MHz ;Freq. for Instruction Clock Cycle is 2MHz (1/2 of 4MHz). ;(1/2MHz) x 10 Clk x10x200=10 msec. Overheads are excluded in this calculation. L3 LDAA #10 STAA R2 L2 LDAA #200 STAA R1 L1 NOP ;1 Intruction Clk Cycle NOP ;1 NOP ;1 DEC R1 ;4 BNE L1 ;3 DEC R2 ;Total Instr.Clk=10 BNE L2 DEC R3 BNE L3 ;-------------- PULA ;Restore Reg A RTS ;------------------- ;************************************************************** ;* Interrupt Vectors * ;************************************************************** ORG $FFFE DC.W Entry ;Reset Vector. CPU wakes here and it is sent to start of the code at $4000