;RTI (Real Time Interrupt) Interrupt Programming with AsmIDE or MiniIDE on Dragon12+ with D-Bug12 ;Buzzer sounds continuously while waiting for AN Interrupt ;PORTB.4 Toggle every Second using RTI (real time interrupt) ;Remember RTI uses the XTAL freq. (not the bus Freq) which is XTAL=8 MHz on Dragon12+ board ;The Interrupts go to the Interrupt vector table in $FFFF-FFxx ROM addres area. ;However,the D-Bug12 redirects them to RAM space area of $3Exx-3Exx ;We must redirect them from these areas to our ISR. ;Modified from example 11-18 by of HCS12 textbook by Mazidi & Causey ;Modified and tested by Mazidi. #include "C:\Reg9s12.H" ;----------------------USE $1000-$2FFF for Scratch Pad and Stack R1 EQU $1001 R2 EQU $1002 R3 EQU $1003 ORG $1200 TEMP DC.B 1 COUNT DC.B 1 ;code section ORG $2000 LDS #$2000 ;Stack LDAA #$FF STAA DDRB ;MAKE PORTB AN OUTPUT PORT BSET DDRJ,%00000010 ;MAKE PORTJ1 AN OUTPUT PIN BCLR PTJ,%00000010 ;TURN OFF PORTJ1 TO ALLOW LEDs ON PORTB TO SHOW DATA BSET DDRT,%00100000 ;PTT5 as Output pin for buzzer ;INTERRUPT SET-UP FOR RTI BSET CRGINT,%10000000 LDAA #%01111111 ;longest RTI is about 0.13 sec Change this number to see toggling rate for RTI STAA RTICTL CLR TEMP CLR COUNT BSET DDRB,%00010000 ;Make PB4 and output CLI ;ENABLE INTERRUPTS GLOBALLY ;-------Sound the Buzzer at PTT5 forever and wait for interrupt BACK BSET PTT,%00100000 ;PTT5=1 JSR DELAY BCLR PTT,%00100000 ;PTT5=0 JSR DELAY BRA BACK ;Keep sounding buzzer ;--------------RTI INTERRUPT SERVICE ROUTINE. Toggle the PORTB4 every second RTI_ISR INC COUNT LDAA COUNT CMPA #8 ; 8 x 0.13 sec = 1 sec. Also change this number for shorter or long BNE OVER LDAA TEMP EORA #%00010000 STAA TEMP STAA PORTB CLR COUNT OVER BSET CRGFLG,%10000000 ;clear the RTI flag for next round RTI ;Return from RTI ISR ;----------DELAY DELAY PSHA ;Save Reg A on Stack LDAA #100 ;Change this value to hear STAA R3 ;different Buzzer sounds ;--1 msec delay. The D-Bug12 works at speed of 48MHz with XTAL=8MHz on Dragon12+ board ;Freq. for Instruction Clock Cycle is 24MHz (1/2 of 48Mhz). ;(1/24MHz) x 10 Clk x240x10=1 msec. Overheads are excluded in this calculation. L3 LDAA #10 STAA R2 L2 LDAA #240 STAA R1 L1 NOP ;1 Intruction Clk Cycle NOP ;1 NOP ;1 DEC R1 ;4 BNE L1 ;3 DEC R2 ;Total Instr.Clk=10 BNE L2 DEC R3 BNE L3 ;-------------- PULA ;Restore Reg A RTS ;------------------- ;------ ;************************************************************** ;In HCS12, the Interrupts go to the Interrupt vector table in $FFFF-FFxx ROM addres area. ;However,the D-Bug12 redirects them to RAM space area of $3Exx-3Exx ;We must redirect them from these areas to our ISR. ; ;* Interrupt Vector Table Addresses for D-Bug12 are on page 365 of Mazidi & Causey HCS12 textbook ;************************************************************** ORG $3E70 ;Vector table location for RTI interupt is 3E4C (See page 365 of Mazidi & Causey HCS12 textbook) DC.W RTI_ISR