/* p11_3.c Visible duty cycle change PWM by Timer_A0.4
 *
 * This program uses Timer_A0.4 to generate PWM output at 
 * 1 Hz and variable duty cycle.
 * This program is based on P11_2.c but using a slow clock
 * so that the change of duty cycle is visible by naked eyes
 * without the aid of an oscilloscope.
 * ACLK (32 KHz) is used for timer clock
 *
 * The duty cycle of generated waves are:
 * 1%, 11%, 21%, 31%, 41%, 51%, 61%, 71%, 81%, and 91%
 *
 * Tested with Keil 5.20 and MSP432 Device Family Pack V2.2.0
 * on XMS432P401R Rev C.
 */

#include "msp.h"

void delayMs(int n);
void portRemap(void);

int main(void) {
	/* Configure P2.7 as Timer A0.4 output */
    P2->SEL0 |= 0x80;
    P2->SEL1 &= ~0x80;
    P2->DIR |= 0x80;

    portRemap();                    /* remap pins */

    /* configure TimerA0.4 as PWM */
    TIMER_A0->CCR[0] = 50000-1;     /* PWM Period */
    TIMER_A0->CCR[4] = 500;         /* begin from 1% */
    TIMER_A0->CCTL[4] = 0xE0;       /* CCR4 reset/set mode */
    TIMER_A0->CTL = 0x0114;         /* use ACLK, count up, clear TA0R register */

    while (1) {
        /* increase duty cycle by 10% */
        TIMER_A0->CCR[4] += 5000;
        if (TIMER_A0->CCR[4] > 50000)   /* wrap around when reaches 100% */
            TIMER_A0->CCR[4] = 500;		/* begin from 1% */

				/* wait a cycle */
				while((TIMER_A0->CCTL[0]& 1) == 0); /*wait until the CCIFG of CCR0 is set*/
				TIMER_A0->CCTL[0]&= ~1;             /* clear the CCIFG flag */
    }
}

void portRemap(void) {
    PMAP->KEYID = 0x2D52;           /* unlock PMAP */

    P2MAP->PMAP_REGISTER1 = 23;     /* remap P2.1 to 23 (TPM0.4) */
    P2->DIR |= 2;
    P2->SEL0 |= 2;
    P2->SEL1 &= ~2;

    PMAP->CTL = 1;                  /* lock PMAP */
    PMAP->KEYID = 0;
}