; Port 1 Pin Direction Register
P1DIR EQU 0x40004C04
; Port 1 Pin Output Register
P1OUT EQU 0x40004C02

        THUMB
        AREA    |.text|, CODE, READONLY, ALIGN=2
        EXPORT  __main

__main
        ; make P1.0 an output pin
        LDR     R0, =P1DIR      ; load Dir Reg in R1
        LDRB    R1, [R0]
        ORR     R1, #1          ; set bit 0
        STRB    R1, [R0]        ; store back to Dir Reg

loop
        ; turn off red LED
        LDR     R0, =P1OUT      ; load Output Data Reg in R1
        LDRB    R1, [R0]
        MVN     R2, #1          ; load complement of bit 0 mask
        AND     R1, R2          ; clear bit 0
        STRB    R1, [R0]        ; store back to Output Data Reg

        ; delay for 0.5 second
        MOV     R0, #500
        BL      delayMs

        ; turn on red LED
        LDR     R0, =P1OUT      ; load Output Data Reg in R1
        LDRB    R1, [R0]
        ORR     R1, #1          ; set bit 0
        STRB    R1, [R0]        ; store back to Output Data Reg

        ; delay for 0.5 second
        MOV     R0, #500
        BL      delayMs

        B       loop	; repeat the loop

; This subroutine performs a delay of n ms (for 3 MHz CPU clock). 
; n is the value in R0.
delayMs
        MOVS    R0, R0          ; if n = 0, return
        BNE     L1
        BX      LR
L1      MOV     R1, #250        ; do inner loop 250 times
L2      SUBS    R1, #1          ; inner loop
        BNE     L2
        SUBS    R0, #1          ; do outer loop n times
        BNE     L1
        BX      LR

        ALIGN
        END